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d a t a sh eet product speci?cation file under integrated circuits, ic17 1999 apr 16 integrated circuits P87CL881H low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram
1999 apr 16 2 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H contents 1 features 2 general description 3 ordering information 4 block diagram 5 pinning information 5.1 pinning 5.2 pin description 6 functional description 6.1 special function registers 6.2 i/o facilities 6.3 internal data memory 6.4 otp programming 6.5 oscillator circuitry 6.6 non-conformance 7 limiting values 8 dc characteristics 9 ac characteristics 9.1 ac testing 10 package outline 11 soldering 11.1 introduction to soldering surface mount packages 11.2 reflow soldering 11.3 wave soldering 11.4 manual soldering 11.5 suitability of surface mount ic packages for wave and reflow soldering methods 12 definitions 13 life support applications 14 purchase of philips i 2 c components
1999 apr 16 3 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 1 features full static 80c51 cpu; enhanced 8-bit architecture with: C minimum 6 cycles per instruction (twice as fast as a standard 80c51 core) C non-page oriented instructions C direct addressing C four 8-byte ram register banks C stack depth limited only by available internal ram (maximum 256 bytes) C multiply, divide, subtract and compare instructions. very low current consumption single supply voltage of 2.7 to 3.6 v frequency: 1 to 10 mhz operating temperature: - 25 to +70 c 44-pin lqfp package four 8-bit ports (32 i/o lines) 63-kbyte one-time programmable (otp) program memory; programmable in parallel mode or in-system via i 2 c-bus interface. 256-byte internal ram 1792-byte internal aux-ram external address range: 64 kbytes of rom and 64 kbytes of ram amplitude controlled oscillator (aco) suitable for use with a quartz crystal or ceramic resonator improved power-on/power-off reset circuitry (por) low voltage detection (lvd) with 11 software programmable levels 8 interrupts on port 1, edge or level sensitive triggering selectable via software power-saving use for keyboard control twenty source, twenty vector interrupt structure with two priority levels wake-up from power-down mode via lvd or external interrupts at port 1 two 16-bit timer/event counters additional 16-bit timer/event counters, with capture, compare and pwm function watchdog timer full duplex enhanced uart with double buffering i 2 c-bus interface for serial transfer on two lines, maximum operating frequency 400 khz. 2 general description the p87cl881 is an 8-bit microcontroller especially suited for pager applications. the p87cl881 is manufactured in an advanced cmos technology and is based on single chip technology. the device is optimized for low power consumption and has two software selectable features for power reduction: idle and power-down modes. in addition, all derivative blocks switch off their clock if they are inactive. the instruction set of the p87cl881 is based on that of the 80c51. the p87cl881 also functions as an arithmetic processor having facilities for both binary and bcd arithmetic plus bit-handling capabilities. the instruction set consists of over 100 instructions: 49 one-byte, 46 two-byte, and 16 three-byte. this data sheet details the specific properties of the p87cl881; for details of the p87cl881 core and the derivative functions see the telx family data sheet and 8051-based 8-bit microcontrollers; data handbook ic20 . 3 ordering information note 1. please refer to the order entry form (oef) for this device for the full type number to use when ordering. this type number will also specify the required program and options. type number (1) product type package name description version P87CL881H/000 blank otp lqfp44 plastic low pro?le quad ?at package; 44 leads; body 10 10 1.4 mm sot389-1 P87CL881H/xxx factory-programmed otp
1999 apr 16 4 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... 4 block diagram handbook, full pagewidth mgl617 xtal1 xtal2 aco 80c51 core excluding rom/ram two 16-bit timer/ event counters (t0, t1) clk (2) parallel i/o ports p0 p1 p3 p2 txd (4) t2comp (2) sda (2) scl (2) rxd (4) ad0 to ad7 (1) a8 to a15 (3) t2 (2) rst porenable t2ex (2) cpu serial uart port data memory ram data memory aux-ram v dd v ss 8-bit internal bus program memory rom 16-bit timer/event counter with capture/ compare/ (t2) eeprom i 2 c-bus interface watchdog timer (t3) por lvd P87CL881H t0 (4) t1 (4) int0 (4) int1 (4) int2 to int8 (2) 7 rd (4) wr (4) ea psen ale ew v ddp v ssp v pp (5) fig.1 block diagram. (1) alternative function of port 0. (2) alternative function of port 1. (3) alternative function of port 2. (4) alternative function of port 3. (5) alternative function of pin 6.
1999 apr 16 5 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 5 pinning information 5.1 pinning fig.2 pin configuration. handbook, full pagewidth P87CL881H mgl616 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 p1.5/int7 p1.6/int8/scl p1.7/int9/sda rst p3.0/rxd/data porenable/v pp p3.1/txd/clock p3.2/int0 p3.3/int1 p3.4/t0 p3.5/t1 p2.5/a13 p2.6/a14 p2.7/a15 psen ale ew ea p0.7/ad7 p0.6/ad6 p0.5/ad5 p0.4/ad4 p0.3/ad3 p0.2/ad2 p0.1/ad1 p0.0/ad0 v ddp v dd p1.0/int2/t2 p1.1/int3/t2ex p1.2/int4/t2comp p1.3/int5 p1.4/int6/clk p3.6/wr p3.7/rd xtal2 xtal1 v ssp v ss p2.0/a8 p2.1/a9 p2.2/a10 p2.3/a11 p2.4/a12
1999 apr 16 6 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 5.2 pin description table 1 lqfp package symbol pin description v dd 39 power supply for core. v ddp 38 power supply for i/o ring. v ss 17 ground for core. v ssp 16 ground for i/o ring. rst 4 reset. a low level on this pin for two machine cycles while the oscillator is running, resets the device. the rst pin is also an output which can be used to reset other ics. porenable/v pp 6 porenable. if set to a logic 1, the internal power-on reset circuit is enabled. if external reset circuitry is used, it is recommended to keep porenable low in order to achieve the lowest power consumption. this pin is also used for the otp programming voltage v pp . ew 28 enable watchdog timer. xtal2 14 crystal output. output of the amplitude controlled oscillator. if an external oscillator clock is used this pin not used. xtal1 15 crystal input. input to the amplitude controlled oscillator. also the input for an externally generated clock source. psen 26 program store enable. read strobe to external program memory. when executing code out of external program memory, psen is activated twice each machine cycle. however, during each access to external data memory two psen activations are skipped. during power-down mode the psen pin stays high. ale 27 address latch enable. latches the low byte of the address during accesses to external memory. it is activated every six oscillator periods and may be used for external timing or clocking purposes. for improved emc behaviour, the toggle of the ale pin can be disabled by setting the rfi bit in the pcon register by software. this bit is cleared on reset and can be set and cleared by software. when set, the ale pin will be pulled-down internally, switching an external address latch to a quiet state. the movx instruction will still toggle ale if external memory is accessed. ale will retain its normal high state during idle mode and a low state during the power-down mode while in the emc mode. additionally, during internal access ( ea = 1) ale will toggle normally when the address exceeds the internal program memory size. during external access ( ea = 0) ale will always toggle normally, whether the rfi bit is set or not. ea 29 external access. when ea is held high, the cpu executes out of the internal program memory (unless the program counter exceeds the highest address for internal program memory). when ea is held low, the cpu executes out of external program memory regardless of the value of the program counter. the state of the ea pin is internally latched at reset.
1999 apr 16 7 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H p0.0/ad0 37 port 0. 8-bit bidirectional i/o port with alternative functions. every port pin can be used as open-drain, standard port, high-impedance input or push-pull output, according to section 6.2. ad7 to ad0 provide the multiplexed low-order address and data bus during accesses to external memory. p0.1/ad1 36 p0.2/ad2 35 p0.3/ad3 34 p0.4/ad4 33 p0.5/ad5 32 p0.6/ad6 31 p0.7/ad7 30 p1.0/int2/t2 40 port 1. 8-bit bidirectional i/o port with alternative functions. every port pin except p1.6 and p1.7 (i 2 c-bus pins) can be used as open-drain, standard port, high-impedance input or push-pull output, according to section 6.2. port 1 also serves the alternative functions int2 to int9 interrupts, timer 2 external input and timer 2 compare output, external clock output clk and i 2 c-bus clock and i 2 c-bus data in/outputs. p1.1/int3/t2ex 41 p1.2/int4/ t2comp 42 p1.3/int5 43 p1.4/int6/clk 44 p1.5/int7 1 p1.6/int8/scl 2 p1.7/int9/sda 3 p2.0/a8 18 port 2. 8-bit bidirectional i/o port with alternative functions. every port pin can be used as open-drain, standard port, high-impedance input or push-pull output, according to section 6.2. port 2 emits the high order address byte during accesses to external memory that use 16-bit addresses (movx @ dptr). in this application it uses the strong internal pull-ups when emitting logic 1's. during accesses to external memory that use 8-bit addresses (movx @ ri), port 2 emits the contents of the p2 special function register. p2.1/a9 19 p2.2/a10 20 p2.3/a11 21 p2.4/a12 22 p2.5/a13 23 p2.6/a14 24 p2.7/a15 25 p3.0/rxd/data 5 port 3. 8-bit bidirectional i/o port with alternative functions. every port pin can be used as open-drain, standard port, high-impedance input or push-pull output, according to section 6.2. rxd/data is the serial port receiver data input (asynchronous) or data i/o (synchronous). txd/clock is the serial port transmitter data output (asynchronous) or clock output (synchronous). int0 and int1 are external interrupt lines. t0 and t1 are external inputs for timers 0 and 1 respectively. wr is the external memory write strobe and rd is the external memory read strobe. p3.1/txd/clock 7 p3.2/ int0 8 p3.3/ int1 9 p3.4/t0 10 p3.5/t1 11 p3.6/ wr 12 p3.7/ rd 13 symbol pin description
1999 apr 16 8 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 6 functional description for the functional and block descriptions of the p87cl881, refer to the telx family data sheet. 6.1 special function registers table 2 special function registers memory map and reset values; note 1 register name register mnemonic sfr address reset value (2) 80c51 core accumulator acc e0h 0000 0000 b register b f0h 0000 0000 data pointer low byte dpl 82h 0000 0000 data pointer high byte dph 83h 0000 0000 program counter high byte pch no sfr 0000 0000 program counter low byte pcl no sfr 0000 0000 power control register pcon 87h 0000 0000 prescaler register presc f3h 0000 0000 program status word psw d0h 0000 0000 stack pointer sp 81h 0000 0111 xram page register xramp fah xxxx x 000 timers 0 and 1 timer/counter control register tcon 88h 0000 0000 timer/counter 0 high byte th0 8ch 0000 0000 timer/counter 1 high byte th1 8dh 0000 0000 timer/counter 0 low byte tl0 8ah 0000 0000 timer/counter 1 low byte tl1 8bh 0000 0000 timer/counter mode control register tmod 89h 0000 0000 ports alternative port function control register altp a3h 0000 0000 port p0 output data register p0 80h 1111 1111 port p0 con?guration a register p0cfga 8eh 1111 1111 port p0 con?guration b register p0cfgb 8fh 0000 0000 port p1 output data register p1 90h 0111 1111 port p1 con?guration a register p1cfga 9eh 0000 1000 port p1 con?guration b register p1cfgb 9fh 0111 1111 port p2 output data register p2 a0h 1111 1111 port p2 con?guration a register p2cfga aeh 1111 1111 port p2 con?guration b register p2cfgb afh 0000 0000 port p3 output data register p3 b0h 1111 1111 port p3 con?guration a register p3cfga beh 1111 1110 port p3 con?guration b register p3cfgb bfh 1111 1111
1999 apr 16 9 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H timer 2 timer 2 compare high byte comp2h abh 0000 0000 timer 2 compare low byte comp2l aah 0000 0000 timer 2 reload/capture high byte rcap2h cbh 0000 0000 timer 2 reload/capture low byte rcap2l cah 0000 0000 timer/counter 2 control register t2con c8h 0000 0000 timer/counter 2 high byte th2 cdh 0000 0000 timer/counter 2 low byte tl2 cch 0000 0000 interrupt logic interrupt enable register 0 ien0 a8h 0000 0000 interrupt enable register 1 ien1 e8h 0000 0000 interrupt enable register 2 ien2 f1h 0000 0000 interrupt priority register 0 ip0 b8h 0000 0000 interrupt priority register 1 ip1 f8h 0000 0000 interrupt priority register 2 ip2 f9h 0000 0000 interrupt sensitivity register 1 ise1 e1h 0000 0000 interrupt polarity register ix1 e9h 0000 0000 interrupt request flag register 1 irq1 c0h 0000 0000 low voltage detection lvd control register lvdcon f2h 0000 0000 poraco reset status register rstat e6h xxx 1 1000 uart serial port buffer s0buf 99h 0000 0000 serial port control register s0con 98h 0000 0000 i 2 c-bus interface address register s1adr dbh 0000 0000 serial control register s1con d8h 0000 0000 data shift register s1dat dah 0000 0000 serial status register s1sta d9h 1111 1000 watchdog timer watchdog timer control register wdcon a5h 1010 0101 watchdog timer interval register wdtim ffh 0000 0000 register name register mnemonic sfr address reset value (2)
1999 apr 16 10 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H notes 1. e7h and fdh are reserved locations and must not be written to. 2. where: x = undefined state. otp interface otp address high register oah d5 x 00 x xxxx otp address low register oal d4 xxxx xxxx otp data register odata d6 xxxx xxxx otp in-system programming register oisys dc 000x 0000 otp test register otest d7 0000 0000 register name register mnemonic sfr address reset value (2) 6.2 i/o facilities 6.2.1 p orts the p87cl881 has 32 i/o lines treated as 32 individually addressable bits or as four parallel 8-bit addressable ports. ports 0, 1, 2 and 3 perform the following alternative functions: port 0 provides the multiplexed low-order address and data bus for expanding the device with standard memories and peripherals. port 1 used for a number of special functions: p1.0 to p1.7 provides the inputs for the external interrupts int2 to int9 p1.0/t2 and p1.1/t2ex for external inputs of timer 2 p1.2/t2comp for external activation and compare output of timer 2 p1.4/clk for the clock output p1.6/scl and p1.7/sda for the i 2 c-bus interface are real open-drain outputs or high-impedance; no other port configurations are available. port 2 provides the high-order address bus when expanding the device with external program memory and/or external data memory. port 3 pins can be configured individually to provide: p3.0/rxd/data and p3.1/txd/clock which are serial port receiver input and transmitter output (uart) p3.2/ int0 and p3.3/ int1 are external interrupt request inputs p3.4/t0 and p3.5/t1 as counter inputs p3.6/ wr and p3.7/ rd are control signals to write and read to external memories. to enable a port pin alternative function, the port bit latch in its sfr must contain a logic 1. each port consists of a latch (special function registers p0 to p3), an output driver and input buffer. all ports have internal pull-ups. figure 3(a) shows that the strong transistor p1 is turned on for only 1 oscillator period after a low-to-high transition in the port latch. when on, it turns on p3 (a weak pull-up) through the inverter in1. this inverter and transistor p3 form a latch which holds the logic 1. 6.2.2 p ort i/o configuration i/o port output configurations are determined by the settings in the port configuration sfrs. each port has two associated sfrs: pncfga and pncfgb, where n indicates the specific port number (0 to 3). one bit in each of the 2 sfrs relates to the output setting for the corresponding port pin, allowing any combination of the 2 output types to be mixed on those port pins. for example, the output type of p1.3 is controlled by setting bit 3 in the sfrs p1cfga and p1cfgb. the port pins may be individually configured via the sfrs with one of the following modes (p1.6 and p1.7 can be open-drain or high-impedance but never have any diodes against v dd ). mode 0 open-drain; quasi-bidirectional i/o with n-channel open-drain output. use as an output (e.g. port 0 for external memory accesses ( ea = 0) or access above the built-in memory boundary) requires the connection of an external pull-up resistor. the esd protection diodes against v dd and v ss are still present. except for the i 2 c-bus pins p1.6 and p1.7, ports which are configured as open-drain still have a protection diode to v dd . see fig.3a.
1999 apr 16 11 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H mode 1 standard port; quasi-bidirectional i/o with pull-up. the strong pull-up p1 is turned on for only one oscillator periods after a low-to-high transition in the port latch. after these two oscillator periods the port is only weakly driven through p2 and very weakly driven through p3. see fig.3b. mode 2 high-impedance; this mode turns all port output drivers off. thus, the pin will not source or sink current and may be used as an input-only pin with no internal drivers for an external device to overcome. see fig.3c. mode 3 push-pull; output with drive capability in both polarities. in this mode, pins can only be used as outputs. see fig.3d. tables 2 and 3 show the configuration register settings for the four output configurations. the electrical characteristics of each output configuration are specified in chapter 8. the default port configuration after reset is given in table 2. in case of external memory access, the appropriate options for ports p0, p2 and p3.6/p3.7 ( wr/ rd, only in case of external data memory access) must be set by software. for special function registers for port configurations/data please refer to table 2, note 1. table 3 port con?guration register settings note 1. mode changes may cause glitches to occur during transitions. when modifying both registers, write instructions should be carried out consecutively. mode (1) pncfga pncfgb port output configuration normal ports i 2 c-bus ports (p1.6 and p1.7) 0 0 0 open-drain open-drain 1 1 0 quasi-bidirectional open-drain 2 0 1 high-impedance high-impedance 3 1 1 push-pull open-drain
1999 apr 16 12 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H handbook, full pagewidth mbk004 this diode is not implemented on the i 2 c-bus pins v ss v dd external n q from port latch external pull-up i/o pin input data v dd v ss fig.3 port configuration options. a. open-drain. c. high-impedance. d. push-pull. b. standard/quasi-bidirectional. handbook, full pagewidth mbk001 p1 p2 p3 input data 1 oscillator period n v ss v dd strong pull-up i/o pin q from port latch in1 v ss handbook, full pagewidth mbk002 this diode is not implemented on the i 2 c-bus pins input data v dd i/o pin v ss handbook, full pagewidth mbk003 p n strong pull-up q from port latch v ss v dd v dd i/o pin input data v ss
1999 apr 16 13 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 6.3 internal data memory the internal data memory is divided into three physically separated parts: 256 bytes of ram, 128 bytes of special function registers and 1792 bytes of aux-ram. these can be addressed each in a different way (see also table 4). 1. ram 0 to 127 can be addressed directly and indirectly as in the 80c51; address pointers are r0 and r1 of the selected register-bank 2. ram 128 to 255 can only be addressed indirectly; address pointers are r0 and r1 of the selected register bank 3. aux-ram 0 to 1791 is indirectly addressable via the aux-ram page register (xramp) and movx-ri instructions, unless it is disabled by setting ard = 1. aux-ram 0 to 1791 is also indirectly addressable as external data memory via movx-datapointer instruction, unless it is disable by setting ard = 1. when executing from internal program memory, an access to aux-ram 0 to 1791 when ard = 0 will not affect the ports p0, p2, p3.6 and p3.7. an access to external data memory locations higher than 1791 will be performed with the movx @ dptr instructions in the same way as in the 80c51 structure, so with p0 and p2 as data/address bus and p3.6 and p3.7 as write and read timing signals. note that the external data memory cannot be accessed with r0 and r1 as address pointer if the aux-ram is enabled (ard = 0, default after reset). the special function registers (sfr) can only be addressed directly in the address range from 128 to 255. four register banks, each 8 registers wide, occupy locations 0 through 31 in the lower ram area. only one of these banks may be enabled at a time. the next 16 bytes, locations 32 through 47, contain 128 directly addressable bit locations. the stack can be located anywhere in the internal 256 bytes ram. the stack depth is only limited by the available internal ram space of 256 bytes (see fig.4). table 4 internal data memory map location address addressing ram 0 to 127 direct and indirect aux-ram 0 to 1791 indirect only with movx ram 128 to 255 indirect only sfr 128 to 255 direct only fig.4 memory map. handbook, full pagewidth mgl618 internal (ea = 1) fbffh external (ea = 0) ffffh ffffh 00 00h 0000h 7fh ffh indirect addressing direct page 0 page 1 page 2 page 3 page 4 page 5 page 6 external data memory data memory internal aux-ram (ard = 0) program memory internal ram indirect and direct addressing 0700h 06ffh (ard = 1) (ard = 0/1)
1999 apr 16 14 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 6.3.1 aux-ram p age r egister (xramp) the aux-ram page register is used to select one of the seven 256 bytes pages of the internal 1792-byte aux-ram for movx-accesses via r0 or r1. its reset value is xxxx x000 (aux-ram page 0). table 5 aux-ram page register (sfr address fah) table 6 description of xramp bits table 7 memory locations for all possible movx accesses note 1. ard (aux-ram disable) corresponds to bit 6 in the special function register pcon (address 87h). 76543210 ----- xramp2 xramp1 xramp0 bit symbol function 7to3 - reserved, unde?ned during read, a write operation must write logic 0 to these locations 2 xramp2 aux-ram page select bit 2 1 xramp1 aux-ram page select bit 1 0 xramp0 aux-ram page select bit 0 ard (1) xramp2 xramp1 xramp0 access instruction type 0 0 0 0 aux-ram page 0 (address 0 to 255) movx @ ri, a and movx @ a, ri 0 0 0 1 aux-ram page 1 (address 256 to 511) 0 0 1 0 aux-ram page 2 (address 512 to 767) 0 0 1 1 aux-ram page 3 (address 768 to 1023) 0 1 0 0 aux-ram page 4 (address 1024 to 1279) 0 1 0 1 aux-ram page 5 (address 1280 to 1535) 0 1 1 0 aux-ram page 6 (address 1536 to 1791) 0 1 1 1 no valid memory access 1 x x x external ram locations 0 to 255 0 x x x aux-ram locations 0 to 1791 external ram locations 1792 to 65535 movx @ dptr, a and movx a, dptr 1 x x x external ram locations 0 to 65535
1999 apr 16 15 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 6.4 otp programming 6.4.1 otp programming the 63-kbyte one-time programmable (otp) memory can be programmed by using an om4260 programmer together with a programmer adapter om5510. since the memory is programmable only once, programming an already programmed address results in a logical and of the old and new code. the otp code can be read out by the programmer for verification. 6.4.1.1 signature bytes the otp memory contains three signature bytes which can be read by the programmer to identify the device. a special address space has been used for these bytes which does not influence the user address space. the values of the signature bytes are: (030h) = 15h, indicates manufactured by philips semiconductors (031h) = d6h, indicates P87CL881H (060h) = 00h, currently not used. 6.4.2 i n -s ystem p rogramming mode in the in-system programming mode the otp can be programmed under control of the cpu. a program to control programming has to be available in the otp. this mode can be used to program several bytes in the otp if the chip is already in a system e.g. to store tuning parameters. in the in-system programming mode the complete address space otp can be programmed. the user should take care not to overwrite the existing code. for in-system programming four sfrs are used to control the otp. table 8 sfrs for in-system programming sfr name description oah otp address high register oal otp address low register odata otp data register oisys otp in-system register 6.4.2.1 otp in-system programming register (oisys) the oisys sfr controls the in-system programming mode. the data that has to be programmed is stored in the sfr odata and the address for this data in the sfrs oah and oal. table 9 otp in-system programming register (sfr address dch) table 10 description of oisys bits 76543210 --- vpon 0 sig we insysmode bit symbol description 7to5 - these bits are reserved. 4 vpon v pp status (read only). 3 0 this bit is reserved and must be kept to logic 0. 2 sig signature bytes enable. 1 we write enable, enables programming. 0 insysmode in-system programming status bit.
1999 apr 16 16 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 6.4.2.2 mode entry the in-system programming mode is entered by setting the insysmode bit of the oisys sfr. the i 2 c-bus is used for data transfer in this mode. if the i 2 c-bus interface is addressed by an external master, the interface generates an interrupt request. the interrupt handler can now read the oisys sfr and determine the status of the external high voltage (vpon). if high voltage is not present the interrupt is a standard i 2 c-bus interrupt. if high voltage is present the in-system program interrupt routine has to start that writes the insysmode bit (oisys.0) and controls the address and data transfer. the program voltage has to be available and stable for at least 10 m s before the mode is entered and has to be stable until the circuit has left the in-system programming mode. the high voltage can be applied for maximum 60 seconds during the complete lifetime of the circuit. 6.4.2.3 program cycle the data and address must be supplied to the microcontroller and the control program has to write the sfrs: odata, oah and oal. a timer has to be initialized for a 100 m s cycle and the we bit of the oisys sfr must be set. now the core has to be set into idle mode. as long as the circuit is in idle mode a programming pulse is applied. after the interrupt request of the timer the otp is available for normal code fetching. the address applied to the oah and oal sfrs must be in the 63 kbytes address space. 6.4.2.4 verify for in-system programming verify is done in similar way as programming. the circuit is put into idle mode and at the start of this mode the sense amplifiers are switched to verify mode and a read cycle is started. the timer has to be initialized for a cycle of at least 1 m s. the address is supplied by the sfrs oah and oal. the we bit of the oisys sfr has to be reset. the otp output data is latched in the odata sfr. after idle mode is finished this sfr can be read in a normal way. to be sure that the verified data is written into the sfr it is advised to write ffh into the odata sfr before a verify is started. 6.4.2.5 signature bytes the signature bytes can be read by setting the sig bit of the oisys sfr and applying the address of the signature byte. applying a write pulse while the sig bit of the oisys sfr is high is forbidden although the contents of the signature bytes will never be destroyed. the signature bytes (and other test addresses) are always readable independent of the security. 6.4.2.6 how to connect the porenable/v pp pin in the in-system programming mode if the v pp pin is dual-mode (e.g. porenable/v pp ), ics connected to the signal porenable must be able to withstand up to 13 v, i.e. cannot have clamping diodes or low break-down voltages. if the pin is connected to a fixed voltage (v dd or v ss ) there must be a way of switching-off this connection on the pcb. a possible implementation is presented in fig.5. in the example (see fig.5) the por is enabled in normal mode of operation (pin porenable/v pp = 1 by the pull-up), but the v pp source must supply enough current in r p in order to guarantee a minimum 12.5 v on the porenable/v pp pin. note that if in the application the power-on reset is disabled (pin porenable/v pp = 0), applying a high voltage to the porenable/v pp pin will also enable the por circuit. this will cause a reset independent of the actual v dd value. fig.5 example of porenable/v pp connection on a pcb. handbook, halfpage v dd r p v pp pad on pcb P87CL881H mbl001 1 6 11 33 23 12 22 44 34
1999 apr 16 17 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 6.5 oscillator circuitry general information on the oscillator circuitry can be found in the telx family data sheet. 6.5.1 r esonator requirements for correct function of the oscillator, the values of r 1 and c 0 of the chosen resonator (quartz or pxe) must be below the line shown in fig.6a. the value of the parallel resistor r 0 must be less than 47 k w . the wiring between chip and resonator should be kept as short as possible. a. resonator curves for 3.58 mhz. b. resonator equivalent circuit. c 1e and c 2e are the external load capacitances; normally not needed due to integrated load capacitances of typically 10 pf. (1) c 1e =c 2e =22pf. (2) c 1e =c 2e = 0 pf. (3) c 1e =c 2e =12pf. fig.6 resonator requirements for the aco. handbook, halfpage 0 (1) (2) c o (pf) 20 40 80 500 0 r1 ( w ) 400 60 300 200 100 mda088 (3) handbook, halfpage c 1 c 0 l 1 r 1 r 0 mgl137 6.6 non-conformance 6.6.1 p rogramming interface /t ransparent mode the transparent mode is a special operating mode of the microcontroller used for parallel and in-system otp programming. for certain combinations of data written to port 2 (used for control signal during parallel programming mode) the transparent mode may be incorrectly active during normal operation of the microcontroller. in this case, a transition on any of the port 0 pins can influence the read out of the on-chip program memory resulting in incorrect code execution. to avoid this problem, the insysmode bit in the otp in-system programming register (sfr address dch) must be set in the start-up sequence of the program code. apart from preventing incorrect operation as described above, the setting of this bit does not affect the normal operation. 6.6.2 movc instruction limitation the movc access to a data or program byte stored in internal rom/otp-memory is inhibited while fetching code from external program memory in roll-over mode. roll-over mode means that the cpu executes code out of the external program memory because the program counter exceeds the highest address for internal program memory. the affected address range is fc00h to ffffh. 6.6.3 l ow voltage detection the lvdi bit (lvdcon.6) may be incorrectly set due to a glitch on the lvd output when the lvd is enabled by changing the bits lvdcon<3:0> from 0000 to any value within the range 0001 to 0101. if bit ea in register ien0 is enabled, an unwanted interrupt may occur. a software workaround for this problem exist. during the initialisation sequence: enable lvd by writing to register lvdcon enable lvd interrupt by writing to register ien2 clear the lvdi bit by writing to lvdcon a second time set bit ea in register ien0 (ensures lvdi to be cleared after initialisation).
1999 apr 16 18 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 7 limiting values in accordance with the absolute maximum rating system (iec 134). 8 dc characteristics v dd = 2.7 to 3.6 v; v ss =0v; f xtal = 1 to 10 mhz; t amb = - 25 to +70 c; all voltages with respect to v ss ; unless otherwise speci?ed. symbol parameter min. max. unit v dd supply voltage - 0.5 +4.0 v v i input voltage on any pin with respect to ground (v ss ) - 0.5 v dd + 0.5 v p tot total power dissipation - 800 mw t stg storage temperature - 65 +150 c symbol parameter conditions min. typ. max. unit supply v dd supply voltage operating 2.7 - 3.6 v ram data retention in power-down mode 1.0 - 3.6 v v pp otp programming voltage 12.5 - 13.0 v i dd supply current operating v dd =3v; f xtal = 7 mhz; note 1 -- 4.8 ma t amb =25 c - 3.7 - ma i dd(id) supply current idle mode v dd =3v; f xtal = 7 mhz; note 2 -- 0.7 ma t amb =25 c - 0.58 - ma i dd(pd) supply current power-down mode v dd =3v; t amb =25 c; note 3 por and lvd enabled - 25 m a por and lvd disabled - 50 - na i dd(block) supply current per block: v dd =3v; f xtal = 7 mhz; t amb =25 c; notes 4 and 5 watchdog - 220 -m a i 2 c-bus - 180 -m a uart - 180 -m a timer t2 - 180 -m a timer t0 or t1 - 10 -m a
1999 apr 16 19 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H inputs (ports, rst and porenable) v il low-level input voltage notes 6 and 7 0 - 0.2v dd v v ih high-level input voltage note 6 0.8v dd - v dd v ? i il ? low-level input current (ports in mode 1) v in = 0.4 v; note 8 and fig.8 - 10 50 m a ? i il(t) ? low-level input current; high-to-low transition (ports in mode 1) v in = 0.2v dd ; note 8 and fig.8 - 200 1000 m a ? i ileak ? input leakage current (ports in mode 0 or 2) v ss v i v dd -- 1 m a outputs (ports and rst) i ol low-level output current; except sda and scl v ol = 0.4 v 2 -- ma i ol2 low-level output current; sda and scl v ol = 0.4 v; note 9 3 -- ma i oh high-level output current except (push-pull options only) v oh =v dd - 0.4 v 2 -- ma i rst rst pull-up current source v dd =3v; v oh =v dd - 0.4 v 0.05 0.2 -m a v dd =3v; v oh =v ss - 0.6 2.5 m a por (power-on reset) for the lvd (low voltage detection), see note 10 v porh trip level high (option 5 in telx family speci?cation ) 2.13 2.37 2.61 v v porl trip level low (option b in telx family speci?cation ) - 1.30 - v aco (amplitude controlled oscillator) v xtal1 external clock signal amplitude peak-to-peak 500 - v dd mv z i(xtal1) input impedance on xtal1 300 1000 - k w c 1i ; c 2i input capacitance on xtal1 and xtal2 notes 5 and 11 - 10 - pf in-system programming for the otp t prog program cycle time 90 100 110 m s t prog(security) program cycle time security note 12 180 200 220 m s t ver verify cycle time 1 --m s t vpp(setup) program voltage setup time 10 --m s t vpp(max) maximum program voltage time cumulative for the product lifetime -- 60 s i vpp program voltage current in-system programming -- 40 ma symbol parameter conditions min. typ. max. unit
1999 apr 16 20 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H notes 1. the operating supply current is measured with all output pins disconnected; v il =v ss ; v ih =v dd ; rst = v dd ; xtal1 driven with square wave; xtal2 not connected; fetch of nop instructions; all derivative blocks disabled. 2. the idle mode supply current is measured with all output pins and rst disconnected; v il =v ss ; v ih =v dd ; xtal1 driven with square wave; xtal2 not connected; all derivative blocks disabled. 3. the power-down current is measured with all output pins and rst disconnected; v il =v ss ; v ih =v dd ; xtal1 and xtal2 not connected. 4. the typical currents are only for the specific block. to calculate the typical power consumption of the microcontroller, the current consumption of the cpu must be added. example: the typical current consumption of the microcontroller in operating mode with cpu, watchdog and uart active can be calculated as (3.7 + 0.220 + 0.18) ma = 4.1 ma at v dd = 3 v and f xtal = 7 mhz. 5. verified on sampling basis. 6. the input threshold voltage of p1.6/scl and p1.7/sda meet the i 2 c-bus specification. therefore, an input voltage below 0.3v dd will be recognized as a logic 0 and an input voltage above 0.7v dd will be recognized as a logic 1. 7. for pin porenable the v il max is 0.1v dd . 8. not valid for pins sda, scl, rst and porenable. 9. the maximum allowed load capacitance c l is in this case limited to around 200 pf. 10. the lvd is tested according to the telx family specification, chapter - low voltage detection . 11. c 1i /c 2i are the total internal capacitances (including gate capacitance and leadframe capacitance). 12. can also be done by two 100 m s pulses. fig.7 input current. handbook, full pagewidth mgl506 0.5v dd 0.3v dd v dd 0 i il(t) i il i i 500 m a 10 m a
1999 apr 16 21 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H fig.8 typical operating current as a function of v dd ; t amb =25 c; f xtal = 7 mhz. handbook, halfpage 2.2 2.6 4.2 v dd (v) 4.7 5.3 3.5 i dd (ma) 2.9 4.1 3 3.4 3.8 mgl625 fig.9 typical idle current as a function of v dd ; t amb =25 c; f xtal = 7 mhz. handbook, halfpage 2.2 2.6 4.2 v dd (v) 0.8 1.0 0.4 i dd(id) (ma) 0.2 0.6 3 3.4 3.8 mgl626 fig.10 typical power-down current as a function of v dd . (1) por and lvd enabled (t amb =70 c). (2) por and lvd enabled (t amb =25 c). (3) por and lvd disabled (t amb =70 c). (4) por and lvd disabled (t amb =25 c). handbook, halfpage 0 (1) (2) (3) (4) 12 4 4 3 i dd(pd) ( m a) 1 0 2 3 v dd (v) mda085
1999 apr 16 22 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 9 ac characteristics v dd =3v; v ss =0v; t amb = - 25 to +70 c; c l = 50 pf for port 0, ale and psen; c l = 80 pf for all other outputs unless otherwise speci?ed. all values veri?ed on sampling basis. symbol parameter variable clock unit min. max. external program memory t lhll ale pulse width t clk - ns t avll address valid to ale low 0.5t clk - 10 - ns t llax address hold after ale low 0.5t clk - ns t lliv ale low to valid instruction in - 2t clk - 25 ns t llpl ale low to psen low 0.5t clk - ns t plph psen pulse width 1.5t clk - ns t pliv psen low to valid instruction in - 1.5t clk - 35 ns t pxix input instruction hold after psen 0 - ns t pxiz input instruction ?oat after psen - 0.5t clk ns t aviv address to valid instruction in - 2.5t clk - 35 ns t plaz psen low to address ?oat - 5ns external data memory t rlrh rd pulse width 3t clk - ns t wlwh wr pulse width 3t clk - ns t avll address valid to ale low 0.5t clk - ns t llax address hold after ale low 0.5t clk - ns t rldv rd low to valid data in - 2.5t clk ns t rhdx data hold after rd 0 - ns t rhdz data ?oat after rd - t clk ns t lldv ale low to valid data in - 4t clk ns t avdv address to valid data in - 4.5t clk - 30 ns t llwl ale low to rd or wr low 1.5t clk - 15 1.5t clk +15 ns t avwl address valid to rd or wr low 2t clk - ns t whlh rd or wr high to ale high 0.5t clk - 5 0.5t clk +5 ns t qvwx data valid to wr transition 0.5t clk - ns t qvwh data valid time wr high 3.5t clk - ns t whqx data hold after wr 0.5t clk - ns t rlaz rd low to address ?oat - 0ns
1999 apr 16 23 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H fig.11 instruction cycle timing. handbook, full pagewidth mga180 p1 p2 s1 p1 p2 s2 p1 p2 s3 p1 p2 s4 p1 p2 s5 p1 p2 s6 p1 p2 s1 p1 p2 s2 p1 p2 s3 p1 p2 s4 p1 p2 s5 p1 p2 s6 one machine cycle one machine cycle xtal1 input address a0 - a7 inst. in address a0 - a7 inst. in address a0 - a7 inst. in address a0 - a7 inst. in address a8 - a15 address a8 - a15 address a8 - a15 address a8 - a15 address a0 - a7 inst. in address a0 - a7 inst. in address a0 - a7 data output or data input address a8 - a15 address a8 - a15 or port 2 out address a8 - a15 old data new data sampling time of i/o port pins during input (including int0 and int1) serial port clock port input port output port 2 bus (port 0) read or write of external data memory port 2 bus (port 0) external program memory fetch wr rd only active during a write to external data memory only active during a read from external data memory psen ale dotted lines are valid when rd or wr are active
1999 apr 16 24 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H fig.12 read from external program memory. handbook, full pagewidth mga176 t lhll ale port 0 port 2 t cy lliv t t llpl t plph t llax t avll aviv t plaz t pliv t t pxix t pxiz address a8 to a15 address a8 to a15 inst. input inst. input a0 to a7 a0 to a7 psen handbook, full pagewidth mga177 t lhll ale port 0 port 2 t cy t lldv t llax t avll avdv t rlaz t address a8 to a15 (dph) or port 2 data input a0 to a7 psen t whlh avwl t t llwl t rlrh t rhdx t rhdz t rldv rd fig.13 read from external data memory.
1999 apr 16 25 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 9.1 ac testing ac testing inputs are driven at 2.4 v for a high level and 0.45 v for a low level. timing measurements are taken at 2.0 v for a high level and 0.8 v for a low level, see fig.15a. the float state is defined as the point at which a port 0 pin sinks 3.2 ma or sources 400 m a at the voltage test levels, see fig.15b. fig.14 write to external data memory. handbook, full pagewidth mga178 t lhll ale port 0 port 2 t cy t llax t avll address a8 to a15 (dph) or port 2 data output a0 to a7 psen t whlh avwl t t llwl t wlwh t whqx t qvwh t qvwx wr fig.15 ac testing input, output waveform (a) and float waveform (b). a. ac inputs during testing are driven at v oh(min) for a logic 1 and v ol(max) for a logic 0. timing measurements are made at v ih(min) for a logic 1 and v il(max) for a logic 0. b. for timing purposes, a port is no longer floating when a 100 mv change from load voltage occurs and begins to float when a 100 mv change from the loaded v oh /v ol level occurs. i oh /i ol > 1.6 ma. handbook, full pagewidth mgl620 v ih(min) v il(max) v oh(min) v ol(max) handbook, full pagewidth mgl619 v load - 0.1 v v load - 0.1 v v oh - 0.1 v v ol - 0.1 v v load = 0.5 v dd
1999 apr 16 26 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 10 package outline unit a max. a 1 a 2 a 3 b p ce (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm 1.60 0.15 0.05 1.45 1.35 0.25 0.45 0.30 0.20 0.12 10.10 9.90 0.80 12.15 11.85 0.70 0.57 1.14 0.85 7 0 o o 0.20 0.10 0.20 1.0 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.75 0.45 sot389-1 95-12-19 d (1) (1) (1) 10.10 9.90 h d 12.15 11.85 e z 1.14 0.85 d b p e e b 11 d h b p e h v m b d z d a z e e v m a 1 44 34 33 23 22 12 q a 1 a l p q detail x l (a ) 3 a 2 x y c w m w m 0 2.5 5 mm scale pin 1 index lqfp44: plastic low profile quad flat package; 44 leads; body 10 x 10 x 1.4 mm sot389-1
1999 apr 16 27 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 11 soldering 11.1 introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations reflow soldering is often used. 11.2 re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 230 c. 11.3 wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 11.4 manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
1999 apr 16 28 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 11.5 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. package soldering method wave reflow (1) bga, sqfp not suitable suitable hlqfp, hsqfp, hsop, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable
1999 apr 16 29 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H 12 definitions 13 life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. 14 purchase of philips i 2 c components data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation. purchase of philips i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c system provided the system conforms to the i 2 c specification defined by philips. this specification can be ordered using the code 9398 393 40011.
1999 apr 16 30 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H notes
1999 apr 16 31 philips semiconductors product speci?cation low-voltage microcontroller with 63-kbyte otp program memory and 2-kbyte ram P87CL881H notes
internet: http://www.semiconductors.philips.com philips semiconductors C a worldwide company ? philips electronics n.v. 1999 sca63 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reli able and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland: ul. lukiska 10, pl 04-123 warszawa, tel. +48 22 612 2831, fax. +48 22 612 2327 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 319762, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 7430 johannesburg 2000, tel. +27 11 470 5911, fax. +27 11 470 5494 south america: al. vicente pinzon, 173, 6th floor, 04547-130 s?o paulo, sp, brazil, tel. +55 11 821 2333, fax. +55 11 821 2382 spain: balmes 22, 08007 barcelona, tel. +34 93 301 6312, fax. +34 93 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 5985 2000, fax. +46 8 5985 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2741 fax. +41 1 488 3263 taiwan: philips semiconductors, 6f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2886, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: talatpasa cad. no. 5, 80640 gltepe/istanbul, tel. +90 212 279 2770, fax. +90 212 282 6707 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 181 730 5000, fax. +44 181 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381, fax. +1 800 943 0087 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 62 5344, fax.+381 11 63 5777 for all other countries apply to: philips semiconductors, international marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 34 waterloo road, north ryde, nsw 2113, tel. +61 2 9805 4455, fax. +61 2 9805 4466 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101 1248, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 20 0733, fax. +375 172 20 0773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 68 9211, fax. +359 2 68 9102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 800 943 0087 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: sydhavnsgade 23, 1780 copenhagen v, tel. +45 33 29 3333, fax. +45 33 29 3905 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615 800, fax. +358 9 6158 0920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 4099 6161, fax. +33 1 4099 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 2353 60, fax. +49 40 2353 6300 hungary: see austria india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: pt philips development corporation, semiconductors division, gedung philips, jl. buncit raya kav.99-100, jakarta 12510, tel. +62 21 794 0040 ext. 2501, fax. +62 21 794 0080 ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, piazza iv novembre 3, 20124 milano, tel. +39 2 6752 2531, fax. +39 2 6752 2557 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381, fax +9-5 800 943 0087 middle east: see italy printed in the netherlands 465008/00/01/pp32 date of release: 1999 apr 16 document order number: 9397 750 05026

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